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基于UMC 0.18μm混合信号工艺,设计实现了一种具有稳定带宽的低压低功耗电荷泵型锁相环电路,参考频率32.768 kHz,输出频率范围1~50 MHz,主要为音频A/D提供采样时钟。分析了锁相环环路带宽,给出了一种稳定环路带宽的简易方法。采用低电源电压1 V,克服了低压设计的一些难点。仿真结果表明,输出频率24.576 MHz(512倍48 kHz采样)时,压控振荡器(VCO)相位噪声为-109 dBc/Hz@1 MHz补偿,总功耗180μW。初步测试结果显示,系统输出正确的频率范围。
Based on the UMC 0.18μm mixed-signal process, a low-voltage, low-power, charge-pump PLL with a stable bandwidth is designed and realized. The reference frequency is 32.768 kHz and the output frequency range is 1 ~ 50 MHz. clock. The loop bandwidth of PLL is analyzed, and a simple method to stabilize the loop bandwidth is given. The low supply voltage of 1 V overcomes some of the difficulties of low-voltage design. The simulation results show that the VCO phase noise is -109 dBc / Hz @ 1 MHz offset with a total power consumption of 180 μW at an output frequency of 24.576 MHz (512x48 kHz sampling). Preliminary test results show that the system outputs the correct frequency range.