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文章介绍了设计Multibus双口模块的方法。通过采用CPLD技术来实现模块内部逻辑,简化了模块的逻辑电路设计,提高了整个模块的稳定性和可靠性。达到了优化传统Multibus总线模块采用逻辑门电路和触发器来实现内部逻辑的目的。
This article describes how to design a Multibus dual-port module. By adopting CPLD technology to realize the internal logic of the module, it simplifies the logic circuit design of the module and improves the stability and reliability of the entire module. To achieve the optimization of the traditional Multibus bus modules using logic gates and flip-flops to achieve the purpose of internal logic.