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本文描述一个2048单元读/写存储器芯片。它采用改进的N沟道MOSFET工艺的六管存储单元。从价格/性能比和功率-延迟乘积着眼,为发挥给定的MOSFET工艺技术的潜力,采取了一些特殊措施。为保持低功耗,不但用了栅驱动器的概念,而且用了脉冲控制外围电路的概念。获得高性能是用快速外围电路延迟芯选的概念和可提供位线恢复电压的双极读出放大器。所介绍的电路成功地利用在芯片上跟踪的方法,以减少最坏情况下器件参数的容差对功耗和性能的影响。本文还介绍了存储器芯片的封装模块、插件和板所组成的功能存储器部件。
This article describes a 2048 cell read / write memory chip. It features a six-pipe memory cell with an improved N-channel MOSFET process. In terms of price / performance ratio and power-delay products, special measures have been taken to exploit the potential of a given MOSFET process technology. In order to maintain low power consumption, not only the concept of gate driver but also the concept of pulse-controlled peripheral circuits is used. Get high performance is the concept of a fast peripheral circuit delay core selection and can provide a bit line recovery voltage bipolar sense amplifier. The presented circuit successfully utilizes on-chip tracking to reduce the power and performance impact of worst case device tolerances. This article also describes the functional memory components that comprise the memory chip’s packaging blocks, add-ons, and boards.