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在混合信号电路设计中我们需要对模拟和数字边界信号进行扫描保护,防止其在扫描测试时候随机翻转影响测试结果,增大静态电流,同时防止扫描的测试向量结果失败.通常设计者会手工通过模拟数字电路设计规范和相互沟通来确定需要保护的节点信号.但如果有遗漏或者是错误,设计往往已经进行到后端,改动设计需要重新综合,伤筋动骨而且效率低下.提出两种方式混合信号电路设计中模拟和数字边界信号进行扫描保护的流程,基本含概SoC设计中Scan保护的所有可能性,给EDA厂商提出一种增强软件功能的思路.通过上述方式设计者可在寄存器传输级仿真阶段就可以找到相应的遗漏点并且可自动插入扫描保护逻辑,从而降低测试功耗,提高效率和测试结果准确性.“,”In mix-signal circuit design, there may be some missing scan safe points, which leads to the increasement of quiescent supply current (iddq) and also the failure of scan patterns. Normally the designer will check them manually by waveform in backend level or design code which may be inefficiency and tricky. The process of scanning protection of analog and digital boundary signals in the design of two modes of the mixed signal circuit is proposed. It basically contains all the possibilities of Scan protection in SoC design, and gives EDA vendors a way of thinking to enhance the function of the software. With this method the designer can find possible missing points in RTL level and mix signal simulation which reduces the test power, speeds up the flow and increases the quality of test results.