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提出一种改进的并行比特翻转算法.为了加快校验节点和变量节点之间的信息传递速率,算法中的比特翻转及校验和更新2个步骤采用并行化处理.仿真结果表明,改进后的算法相对于原有的并行比特翻转算法在误帧率性能上能够取得0.1~0.3dB的增益.同时,改进算法在译码吞吐率的性能上也有所改善.此外,还讨论了翻转门限的选择方法,这些门限决定了每次迭代中哪些比特需要被翻转.通过选择合适的翻转门限,可使错误的比特尽量多地被翻转,并避免翻转正确的比特.该改进算法比较适用于对具有准循环结构的LDPC码进行译码.
An improved parallel bit inversion algorithm is proposed.In order to speed up the transfer of information between check nodes and variable nodes, two steps of bit inversion and check-sum update in the algorithm are parallelized.The simulation results show that the improved Compared with the original parallel bit-flip algorithm, the proposed algorithm can achieve a gain of 0.1 ~ 0.3dB at the frame error rate performance, and the improved algorithm also improves the performance of the decoding throughput.In addition, the choice of flip-threshold These thresholds determine which bits need to be flipped in each iteration. By choosing suitable flip-flops, the wrong bits can be flirted as much as possible and the correct bits can be flipped. This improved algorithm is more suitable for accurate The cyclic LDPC code is decoded.