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一、引言 工艺问题是MOS集成电路（以下简称MOSIC)CMOSIC的关现问题。这里包括二方器的问题,一是工艺参数,材料参数的正确高计,二是工艺条件和方法的稳定,可控,以保证上述工艺参数的实现和稳定。正确的工艺设计建立在目前工艺水平基础之上,过来又纶工艺条件的控制来方便,可以二者是紧密相关的。 本文着重讨论CMOSIC的工艺设计问题,即从CMOSIC的应用条件（如电源电压VOD),由参数指标（如噪工作频fmax等）出发,确事实上的于开启电压VT（坊）开启电压VTF,沅漏击穿电压BVDS以及分布电阻,分布电容等参数的要求,从影响各参数的诸工艺因素的盾分析中,确定材料参数,（如栅电极材料,栅介质材料,S,底材料等）及各工艺参数（如各次氧层厚度,各次扩散结深,化层厚度,表面电控制等）以期实现CMOSICR 的突击特点。即真正的微功耗,较高的速度,较高的容,并保证良好的成率,此外它还为决CMOSIC的突击问题——提高集成度指明方向。工艺设计的中心问题是CMOS的两种沟栅开启电压V_T和厚膜开启电压V_(TF)的控制。我们首先讨论这向问题。
I. INTRODUCTION The process problem is the issue of CMOS IC of MOS integrated circuit (hereinafter referred to as MOSIC). Here includes the problem of two devices, one is the process parameters, the correct height of the material parameters, the second is the process conditions and methods of stability and controllable, in order to ensure the realization of the process parameters and stability. Correct process design based on the current level of technology, come and then control the process conditions to facilitate the Lun, both can be closely related. This article focuses on CMOSIC process design issues, that is, from CMOSIC application conditions (such as power supply voltage VOD), starting from the parameter index (such as noise frequency fmax), indeed in the open-voltage VT (Square) turn-on voltage VTF, (Such as gate electrode material, gate dielectric material, S, bottom material, etc.) from the shield analysis of various process factors affecting each parameter, such as the breakdown voltage BVDS, the distributed breakdown voltage and the distributed resistance, And the process parameters (such as the thickness of the oxygen layer, the depth of each diffusion junction, the thickness of the layer, the surface of the electrical control, etc.) in order to achieve CMOSICR surprise characteristics. That is, real micro-power consumption, high speed, high capacity, and ensure a good rate of success, in addition it also to determine the direction of the CMOSIC assault - to improve integration. The central issue in process design is the control of both the gate-on voltage V_T of CMOS and the turn-on voltage V_ (TF) of the thick film. We first discuss this issue.