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A 1:2 demultiplexer(DEMUX)has been designed and fabricated in SMIC’s standard 0.18-μm CMOS technology,based on standard CML logic and current-density-centric design philosophy.For the integrity of the DEMUX and the reliability of the internal operations,a data input buffer and a static latch were adopted.At the same time,the static latch enables the IC to work in a broader data rate range than the dynamic latch.Measurement results show that under a 1.8-V supply voltage,the DEMUX can operate reliably at any data rate in the range of 5-20Gb/s.The chip size is 875×640μm2 and the power consumption is 144mW,in which the core circuit has a share of less than 28%.
A 1: 2 demultiplexer (DEMUX) has been designed and manufactured in SMIC’s standard 0.18-μm CMOS technology, based on standard CML logic and current-density-centric design philosophy. For the integrity of the DEMUX and the reliability of the internal operations, a data input buffer and a static latch were applied. At the same time, the static latch enables the IC to work in a broader data rate range than the dynamic latch. Measurement results show that under a 1.8-V supply voltage, the DEMUX can operates reliably at any data rate in the range of 5-20 Gb / s. The chip size is 875 × 640 μm2 and the power consumption is 144 mW, where the core circuit has a share of less than 28%.