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设计了一种静态随机读写存储器(SRAM)的BiCMOS存储单元及其外围电路。HSpice仿真结果表明,所设计的SRAM电路的电源电压可低于3V以下,它既保留了CMOSSRAM低功耗、高集成度的特征,又获得了双极型电路快速、大电流驱动能力的长处,因而特别适用于高速缓冲静态存储器和便携式数字电子设备的存储系统中。
A static random access memory (SRAM) BiCMOS memory cell and its peripheral circuits are designed. HSpice simulation results show that the power supply voltage of the designed SRAM circuit can be less than 3V, which not only retains the features of CMOSSRAM with low power consumption and high integration, but also obtains the advantages of fast and large current driving capability of the bipolar circuit, Making it ideal for storage systems that cache both static and portable digital electronic devices.