论文部分内容阅读
本文介绍采用钼—多晶硅工艺的256K动态RAM。发展了包括电子束直接描绘和干法腐蚀工艺的1微米工艺技术。此外,利用作在同一片子上的电可编程序多晶硅电阻器,RAM设计成容(?)(?)。 电路的方框图显示在图1,每个128K方框包括2个64K位的基本单元和大约2K位的备用单元以及一个空读出电路。 备用单元连接到4对备用位线和两对备用字线。因为每对备用位线需要一个附加的读出放大器,所以每个方框里包括516个放大器。放大器包括能够得到高再生电压的耦合电容。放大器电路和工作波形示于图2,放大器以时钟φ_(D1)启动检测信号,以φ_(D2)
This article describes the use of molybdenum - polysilicon 256K dynamic RAM technology. A 1 micron process technology, including direct beam drawing and dry etch, has been developed. In addition, the RAM is designed as a? (?) Using electrically programmable polysilicon resistors on the same chip. The block diagram of the circuit is shown in Figure 1. Each 128K block includes two 64K-bit base units and a spare area of approximately 2K bits and an empty readout circuit. The spare cell is connected to four pairs of spare bit lines and two pairs of spare word lines. Because each pair of spare bit lines requires an additional sense amplifier, each block includes 516 amplifiers. The amplifier includes a coupling capacitor that produces a high regenerative voltage. Amplifier circuit and the working waveform shown in Figure 2, the amplifier to start the detection signal φ_ (D1), φ_ (D2)